Quantum Engineer - Cryo-CMOS Analog Circuit

Job Description

Job Title: Senior Quantum Engineer – Cryo-CMOS Analog Circuit Design. Location: Redmond, Washington, USA

Job Type: Full-Time, Senior Level (Individual Contributor), Hybrid (3 days onsite)

Responsibilities:

• Design and develop CMOS analog circuits and functional blocks for quantum control systems.
• Contribute to architecture and specification of Cryo-CMOS subsystems in collaboration with system and hardware teams.
• Perform simulation and verification of full-custom analog and mixed-signal circuit designs.
• Work across analog, digital, and cryogenic domains to optimize system-level performance tradeoffs;
• Support bring-up, testing, and characterization of ASICs integrated with quantum control hardware.
• Collaborate with system architects, digital designers, and experimental physicists on control system development.
• Translate system-level requirements into robust circuit implementations.
• Document designs, results, and methodologies for reproducibility and internal knowledge sharing.
• Contribute to technical publications and internal engineering reports.

Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 6+ years of experience, or equivalent advanced degrees with fewer years of experience.
• Strong background in analog and mixed-signal circuit design.
• Experience with CMOS analog circuit design and simulation workflows.
• Ability to work in multidisciplinary teams across hardware and physics domains;
• Strong communication and technical documentation skills.
• Ability to pass required security screening and meet export control compliance requirements.
• Experience working in environments where AI tools are used for engineering workflows.

Preferred:

• 10+ years of industry experience in analog or mixed-signal design.
• Experience with EDA tools such as Cadence Virtuoso and Linux-based design environments.
• Knowledge of ADCs, DACs, PLLs, and RF-related analog components.
• Familiarity with Verilog or SystemVerilog and digital verification concepts.
• Experience with cryogenic circuit design, low-temperature measurements, and quantum device interfaces.
• Hands-on ASIC bring-up and lab validation experience.
• Strong record of technical publications or internal research documentation.

Benefits and Compensation:

• Competitive salary range: $119,800 – $234,700 per year (up to $261,000 in specific metro regions).
• Full Microsoft benefits package including healthcare, retirement plans, and paid leave.
• Access to AI-driven engineering tools and modern development environments;
• Opportunities to work on cutting-edge quantum computing systems at scale.
• Career growth in a global research and engineering organization.

Other Information:

• Hybrid work model (3 days per week in office).
• Travel requirement: less than 25%.
• Must meet Microsoft security screening and export control requirements;
• Citizenship or permanent residency verification required due to export regulations.
• Microsoft is an equal opportunity employer committed to inclusion and diversity.